The present invention relates to semiconductor integrated circuits having identification signs, and also relates to methods of designing semiconductor integrated circuits having identification signs. More specifically, this invention relates to semiconductor integrated circuits and methods of designing semiconductor integrated circuits having identification signs that are highly visible even if dummy patterns are arranged around the identification signs.
In an aluminum wiring process of manufacturing semiconductor devices, SiO2 interlayer dielectric layers are polished by chemical-mechanical polishing (CMP). In a Cu wiring process, on the other hand, Cu wiring layers are polished by CMP. When the CMP is not performed uniformly, it is difficult to control the diameters of vias or widths of wirings in the lithography processes that come after the CMP processes.
In order to solve the above-mentioned problem, the method of arranging dummy patterns (dummies), near the circuit pattern is used. Japanese patent laid open gazette No. 2002-9161 (Reference 1), which is incorporated herein by reference in its entirety discloses an exemplary method of arranging dummy patterns, in which i) dummies are arranged with a predetermined pitch, and ii) the dummies that crossover on circuit patterns are deleted.
Character patterns are formed in the semiconductor device as identifying signs, which are comprised of figures, alphabets, etc. The character patterns show, for example, name, kind, type, version of the device, version of a mask of the device, the logo of the company which fabricates the device, the marks for showing the test result of the device, etc. The character patterns are commonly called “logos,” and usually are formed with a metal layer at the corner or other portions of the semiconductor chip.
It is possible to insert the dummy pattern into the area where the character patterns are formed by a conventional method such as disclosed in Reference 1. However, insertion of the dummy pattern by the conventional method makes it extremely difficult to observe the character pattern.
FIG. 3 is an exemplary plane view of a conventional character pattern. FIGS. 4A and 4B show cross-sectional views along the line B-B′ of FIG. 3 before and after the insertion of dummy patterns 12, respectively, around the character pattern 11 by the method disclosed in Reference 1. The dummy patterns 12 inserted into different layers are shifted horizontally with each other.
More details are explained with reference to FIGS. 5A, 5B, and 5C. FIG. 5A is a plane view of an exemplary character pattern in the first metal layer after insertion of dummy patterns using the conventional method described above. FIG. 5B is a plane view of an exemplary character pattern in the second metal layer after insertion of dummy patterns using the conventional method. FIG. 5C is a plane view of the pattern in the second metal layer shown in FIG. 5B stacked over the pattern in the first metal layer shown in FIG. 5A.
Conventionally, after circuit element patterns, which are not shown in FIG. 5, and character patterns are arranged, dummy patterns are inserted as follows. First, dummies having a predetermined shape, such as a rectangular shape shown in FIG. 5, and a predetermined size are arranged with a predetermined pitch in the entire area where the circuit element patterns and the character patterns are arranged. Then, dummies that crossover on the circuit patterns or the character patterns are deleted.
The shape, the size of the dummies, the pitch, and the starting point of the arrangement are decided so as to minimize the amount of Computer Aided Design (CAD) processing within a range that provides necessary pattern density. Therefore, the space between the character patterns and the dummies are not uniform as shown in FIG. 5A or 5B. Accordingly, the visibility of character patterns is decreased by inserting the dummy pattern. Furthermore, because the shape, the size, the arrangement, etc. of the circuit element pattern are different in each layer, the shape, the size, the arrangement pitch, and the starting point of the dummy pattern arrangements are also different in each layer. Therefore, the dummy patterns inserted in two or more layers partially overlap as shown in FIG. 5C, and the visibility of the character pattern decreases remarkably.